Infineon Clock Buffer 8-Pin SOIC
- RS Stock No.:
- 273-7327
- Mfr. Part No.:
- CY2305SXI-1
- Manufacturer:
- Infineon
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Subtotal (1 unit)*
TWD88.00
(exc. GST)
TWD92.40
(inc. GST)
Add 16 units to get free delivery
Last RS stock
- Final 61 unit(s), ready to ship from another location
Units | Per unit |
|---|---|
| 1 - 9 | TWD88.00 |
| 10 - 24 | TWD86.00 |
| 25 - 49 | TWD84.00 |
| 50 - 99 | TWD81.00 |
| 100 + | TWD80.00 |
*price indicative
- RS Stock No.:
- 273-7327
- Mfr. Part No.:
- CY2305SXI-1
- Manufacturer:
- Infineon
Specifications
Product overview and Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Infineon | |
| Product Type | Clock Buffer | |
| Maximum Input Frequency | 133MHz | |
| Maximum Propagation Delay Time | 8.7ns | |
| Mount Type | Surface | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Number of Outputs | 8 | |
| Minimum Supply Voltage | 3V | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Operating Temperature | 0°C | |
| Maximum Operating Temperature | 70°C | |
| Series | CY2305 | |
| Standards/Approvals | No | |
| Height | 1.5mm | |
| Length | 5.84mm | |
| Width | 4.8 mm | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Infineon | ||
Product Type Clock Buffer | ||
Maximum Input Frequency 133MHz | ||
Maximum Propagation Delay Time 8.7ns | ||
Mount Type Surface | ||
Package Type SOIC | ||
Pin Count 8 | ||
Number of Outputs 8 | ||
Minimum Supply Voltage 3V | ||
Maximum Supply Voltage 3.6V | ||
Minimum Operating Temperature 0°C | ||
Maximum Operating Temperature 70°C | ||
Series CY2305 | ||
Standards/Approvals No | ||
Height 1.5mm | ||
Length 5.84mm | ||
Width 4.8 mm | ||
Automotive Standard No | ||
The Infineon Zero delay buffer designed to distribute high speed clocks. It accepts one reference input and drives out five low skew clocks. All parts have on chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on chip and is obtained from the CLKOUT pad. This buffer devices can accept the same input clock and distribute it. In this case, the skew between the outputs of two devices is guaranteed to be less than 700 ps.
60 ps typical cycle to cycle jitter
Zero input output propagation delay
Test mode to bypass phase locked loop
Compatible with Pentium based systems
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