Clock buffers are semiconductor devices that fan out clock signals and isolates the source from the load. Clock buffers are known to have multiple controllable outputs as well as separate power supplies for outputs or for input/output allowing it to work as a level shifter.
Clock buffers are devices clock buffers create multiple copies of input clocks for individual distribution across a PCB. They are comprised of single-ended output buffers and differential outputs. Single-ended output clock buffers are LVCMOS (Low voltage complementary metal-oxide-semiconductor) while differential output buffers may be LVPECL (Low Voltage Positive Emitter Coupled Logic), HSTL (High-speed transceiver logic) or LVDS (Low Voltage Differential Signaling).
Clock buffers don't alter the frequency properties of the input signal, which in turn minimalises the additive noise which is added to the input whilst in the buffering stage.
Clock buffers are offered in an array of variations such as variations on the maximum operating input frequency that can range from 30 Mhz to 8 Ghz, variety on the maximum supply current it can support and the number of pins installed in the IC.
Some clock buffers feature ultra-low jitter and low skew clock distribution.
Clock buffers are widely used in applications such as;