Intelligent Memory IME1G08D2DEBG-25I SDRAM 1 GB Surface, 60-Pin 16 bit FBGA-60 Ball
- RS Stock No.:
- 588-633
- Mfr. Part No.:
- IME1G08D2DEBG-25I
- Manufacturer:
- Intelligent Memory
Subtotal (1 unit)*
TWD724.00
(exc. GST)
TWD760.20
(inc. GST)
FREE delivery for orders over NT$1,300.00
In Stock
- Plus 20 unit(s) shipping from May 27, 2026
Need more? Click ‘Check delivery dates’ to find extra stock and lead times.
Units | Per unit |
|---|---|
| 1 + | TWD724.00 |
*price indicative
- RS Stock No.:
- 588-633
- Mfr. Part No.:
- IME1G08D2DEBG-25I
- Manufacturer:
- Intelligent Memory
Specifications
Product overview and Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Intelligent Memory | |
| Memory Size | 1GB | |
| Product Type | SDRAM | |
| Data Bus Width | 16bit | |
| Maximum Clock Frequency | 533MHz | |
| Number of Bits per Word | 72 | |
| Maximum Random Access Time | 2.5ns | |
| Number of Words | 16777216 | |
| Mount Type | Surface | |
| Package Type | FBGA-60 Ball | |
| Pin Count | 60 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 95°C | |
| Standards/Approvals | JEDEC, RoHS | |
| Series | IME1G(08/16)D2DEB | |
| Maximum Supply Voltage | 1.9V | |
| Automotive Standard | AEC-Q100 | |
| Minimum Supply Voltage | 1.7V | |
| Select all | ||
|---|---|---|
Brand Intelligent Memory | ||
Memory Size 1GB | ||
Product Type SDRAM | ||
Data Bus Width 16bit | ||
Maximum Clock Frequency 533MHz | ||
Number of Bits per Word 72 | ||
Maximum Random Access Time 2.5ns | ||
Number of Words 16777216 | ||
Mount Type Surface | ||
Package Type FBGA-60 Ball | ||
Pin Count 60 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 95°C | ||
Standards/Approvals JEDEC, RoHS | ||
Series IME1G(08/16)D2DEB | ||
Maximum Supply Voltage 1.9V | ||
Automotive Standard AEC-Q100 | ||
Minimum Supply Voltage 1.7V | ||
- COO (Country of Origin):
- TW
The Intelligent Memory Eight bank DDR DRAM is organized as 8 banks x 16Mbit x 8 or 8 banks x 8Mbit x 16. It achieves high-speed data transfer rates by using a chip architecture that prefetches multiple bits and synchronizes the output data with the system clock.
Automatic and controlled precharge command
Power down mode
Auto refresh and self refresh
Related links
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