Microchip, 8 bit PIC, PIC18F47Q43 Microcontroller, 64 MHz, 128kB FLASH, 44-Pin TQFP

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Subtotal (1 tray of 160 units)*

TWD9,184.00

(exc. GST)

TWD9,643.20

(inc. GST)

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Units
Per unit
Per Tray*
160 - 640TWD57.40TWD9,184.00
800 +TWD56.20TWD8,992.00

*price indicative

RS Stock No.:
236-8945
Mfr. Part No.:
PIC18F47Q43-I/PT
Manufacturer:
Microchip
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Brand

Microchip

Product Type

Microcontroller

Series

PIC18F47Q43

Package Type

TQFP

Mount Type

Surface

Pin Count

44

Device Core

PIC

Data Bus Width

8bit

Program Memory Size

128kB

Maximum Clock Frequency

64MHz

RAM Size

8kB

Maximum Supply Voltage

5.5V

DACs

1 x 8 Bit

Number of Programmable I/Os

36

Minimum Operating Temperature

-40°C

Maximum Operating Temperature

85°C

Length

10mm

Standards/Approvals

REACH, RoHS3

Width

1 mm

Minimum Supply Voltage

1.8V

Instruction Set Architecture

RISC

Program Memory Type

FLASH

ADCs

35 x 12 Bit

Automotive Standard

No

The Microchip microcontroller features a 12-bit ADC with Computation (ADCC) automating Capacitive Voltage Divider (CVD) techniques for advanced capacitive touch sensing, averaging, filtering, oversampling and threshold comparison. This family showcases a new 16-bit PWM module which provides dual independent outputs on the same time base. Additional features include vectored interrupt controller with fixed latency for handling interrupts, system bus arbiter, Direct Memory Access (DMA) capabilities, UART with support for asynchronous, DMX, DALI and LIN protocols, SPI, I2C, memory features like Memory Access Partition (MAP) to support users in data protection and bootloader applications, and Device Information Area (DIA), which stores factory calibration values to help improve temperature sensor accuracy.

C Compiler optimized RISC architecture

64 MHz clock input

62.5 ns minimum instruction cycle

Six Direct Memory Access (DMA) Controllers

User programmable source and destination sizes

Hardware and software triggered data transfers

Vectored Interrupt capability

Selectable high/low priority

Fixed interrupt latency of three instruction cycles

Programmable vector table base address

Backwards compatible with previous interrupt capabilities

127-Level deep hardware stack

Low current power on reset (POR)

Configurable Power up timer (PWRT)

Brown out reset (BOR)

low power BOR (LPBOR) Option

Windowed Watchdog timer (WWDT)

Watchdog Reset on too long or too

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