Infineon NOR 512 MB SPI Flash Memory 8-Pin, S25HL512TFAMHI010
- RS Stock No.:
- 273-5425
- Mfr. Part No.:
- S25HL512TFAMHI010
- Manufacturer:
- Infineon
The image is for reference only, please refer to product details and specifications
Subtotal (1 tray of 240 units)*
TWD46,344.00
(exc. GST)
TWD48,662.40
(inc. GST)
FREE delivery for orders over NT$1,300.00
Temporarily out of stock
- Shipping from May 06, 2026
Need more? Click ‘Check delivery dates’ to find extra stock and lead times.
Units | Per unit | Per Tray* |
|---|---|---|
| 240 + | TWD193.10 | TWD46,344.00 |
*price indicative
- RS Stock No.:
- 273-5425
- Mfr. Part No.:
- S25HL512TFAMHI010
- Manufacturer:
- Infineon
Specifications
Product overview and Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Infineon | |
| Product Type | Flash Memory | |
| Memory Size | 512MB | |
| Interface Type | SPI | |
| Pin Count | 8 | |
| Maximum Clock Frequency | 166MHz | |
| Cell Type | NOR | |
| Minimum Supply Voltage | 1.7V | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Operating Temperature | -40°C | |
| Standards/Approvals | ISO26262 ASIL B and ASIL D ready | |
| Series | SEMPER Flash | |
| Automotive Standard | AEC-Q1 Grade 1 | |
| Supply Current | 53mA | |
| Select all | ||
|---|---|---|
Brand Infineon | ||
Product Type Flash Memory | ||
Memory Size 512MB | ||
Interface Type SPI | ||
Pin Count 8 | ||
Maximum Clock Frequency 166MHz | ||
Cell Type NOR | ||
Minimum Supply Voltage 1.7V | ||
Maximum Supply Voltage 3.6V | ||
Minimum Operating Temperature -40°C | ||
Standards/Approvals ISO26262 ASIL B and ASIL D ready | ||
Series SEMPER Flash | ||
Automotive Standard AEC-Q1 Grade 1 | ||
Supply Current 53mA | ||
The Infineon Flash Memory is a Quad SPI family of products which has high speed CMOS, MIRRORBIT™ NOR Flash devices. This flash memory is designed for functional safety with development according to ISO 26262 standard to achieve ASIL B compliance and ASIL D readiness. Read operations from the device are burst oriented. Read transactions can be configured to use either a wrapped or linear burst. Wrapped bursts read from a single page whereas linear bursts can read the whole memory array.
Legacy Block protection
SDR option runs up to 21 MBps
OTP secure silicon array of 1024 bytes
Serial flash discoverable parameters
Minimum 100000 program and erase cycles