Microchip, 32-Pin VQFN, Ethernet Controller 10 Mbps SPI 3.3V LAN8650B1-E/LMX, Half Duplex
- RS Stock No.:
- 352-161
- Mfr. Part No.:
- LAN8650B1-E/LMX
- Manufacturer:
- Microchip
Bulk discount available
View bulk pricing optionsSubtotal (1 unit)*
TWD208.00
(exc. GST)
TWD218.40
(inc. GST)
FREE delivery for orders over NT$1,300.00
In Stock
- 466 unit(s) ready to ship from another location
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Units | Per unit |
|---|---|
| 1 - 9 | TWD208.00 |
| 10 + | TWD188.00 |
*price indicative
- RS Stock No.:
- 352-161
- Mfr. Part No.:
- LAN8650B1-E/LMX
- Manufacturer:
- Microchip
Specifications
Product overview and Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Microchip | |
| Maximum Data Rate | 10Mbps | |
| Product Type | Ethernet Controller | |
| Communication Mode | Half Duplex | |
| Standard Supported | IEEE | |
| Interface Type | SPI | |
| Package Type | VQFN | |
| Maximum Supply Voltage | 3.3V | |
| Pin Count | 32 | |
| Standards/Approvals | No | |
| Select all | ||
|---|---|---|
Brand Microchip | ||
Maximum Data Rate 10Mbps | ||
Product Type Ethernet Controller | ||
Communication Mode Half Duplex | ||
Standard Supported IEEE | ||
Interface Type SPI | ||
Package Type VQFN | ||
Maximum Supply Voltage 3.3V | ||
Pin Count 32 | ||
Standards/Approvals No | ||
- COO (Country of Origin):
- TH
The Microchip MAC-PHY Ethernet Controller with SPI combines a Media Access Controller (MAC) and an Ethernet PHY to enable low‑cost microcontrollers, including those without an onboard MAC, to access 10BASE‑T1S networks. The common standard Serial Peripheral Interface (SPI) of the LAN8650 allows interfacing with nearly any microcontroller, so that the transfer of Ethernet packets and LAN8650 control/status commands are performed over a single, serial interface. SPI also requires only 4 pins, enabling a simpler hardware interface with fewer pins than MII or RMII.
Internal wall clock
Event generation and event capture synchronized to the wall clock
Phase adjuster for the wall clock to minimize microcontroller overhead
Packet timestamping
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