ROHM BR25G320F-3GE2, 32kbit EEPROM Memory 8-Pin SOP SPI
- RS Stock No.:
- 185-0624
- Mfr. Part No.:
- BR25G320F-3GE2
- Manufacturer:
- ROHM
Currently unavailable
We don't know if this item will be back in stock, RS intend to remove it from our range soon.
- RS Stock No.:
- 185-0624
- Mfr. Part No.:
- BR25G320F-3GE2
- Manufacturer:
- ROHM
Specifications
Product overview and Technical data sheets
Legislation and Compliance
Product Details
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- COO (Country of Origin):
- JP
BR25G320F-3 is a 32Kbit Serial EEPROM of SPI BUS Interface.
High Speed Clock Action up to 20MHz (Max)
Wait Function by HOLDB Terminal
Part or Whole of Memory Arrays Settable as Read only Memory Area by Program
1.6V to 5.5V Single Power Source Operation Most Suitable for Battery Use.
Up to 64 Bytes in Page Write Mode.
For SPI Bus Interface (CPOL, CPHA) = (0, 0), (1, 1)
Self-timed Programming Cycle
Low Current Consumption
At Write Action (5V) : 0.5mA (Typ)
At Read Action (5V) : 2.0mA (Typ)
At Standby Action (5V) : 0.1μA (Typ)
Address Auto Increment Function at Read Action
Prevention of Write Mistake
Write Prohibition at Power On
Write Prohibition by Command Code (WRDI)
Write Prohibition by WPB Pin
Write Prohibition Block Setting by Status Registers (BP1, BP0)
Prevention of Write Mistake at Low Voltage
More than 100 years Data Retention.
More than 1 Million Write Cycles.
Bit Format 16Kx8
Initial Delivery Data
Memory Array: FFh
Status Register: WPEN, BP1, BP0 : 0
Wait Function by HOLDB Terminal
Part or Whole of Memory Arrays Settable as Read only Memory Area by Program
1.6V to 5.5V Single Power Source Operation Most Suitable for Battery Use.
Up to 64 Bytes in Page Write Mode.
For SPI Bus Interface (CPOL, CPHA) = (0, 0), (1, 1)
Self-timed Programming Cycle
Low Current Consumption
At Write Action (5V) : 0.5mA (Typ)
At Read Action (5V) : 2.0mA (Typ)
At Standby Action (5V) : 0.1μA (Typ)
Address Auto Increment Function at Read Action
Prevention of Write Mistake
Write Prohibition at Power On
Write Prohibition by Command Code (WRDI)
Write Prohibition by WPB Pin
Write Prohibition Block Setting by Status Registers (BP1, BP0)
Prevention of Write Mistake at Low Voltage
More than 100 years Data Retention.
More than 1 Million Write Cycles.
Bit Format 16Kx8
Initial Delivery Data
Memory Array: FFh
Status Register: WPEN, BP1, BP0 : 0
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